devc-serxzynq
Serial driver for UltraScale+ MPSoC UARTs.
Syntax:
devc-serxzynq [-c clock[/div]]
[-C size]
[-e] [-E]
[-f] [-F]
[-I size]
[-o opt[,opt...]
[-O number
[-s] [-S]
[-t level]
[-T level]
[-r level]
[-u serial_unit_num]
[-v[v]...]
Runs on:
QNX OS
Options:
This driver supports generic devc-ser* options. For information
about those options, see devc-ser*
section of the QNX OS
Utilities Reference guide in the QNX SDP 8.0 documentation.
For this driver, the generic -o option supports the
smmu option.
- smmu=0|1|off|on
- (QNX OS 7.1 or later) Disable or enable the
SMMU Manager support using one of these values:
- 0/off — (Default) Disable SMMU Manager support.
- 1/on — Enable SMMU Manager support.
- -c clk[/div]
- Set the input clock rate and an optional divisor.
- -r level
- Set the real clock value from systempage or commandline (via the -c option) to /dev/clock. The default is 1.
- -t level
- Set receive FIFO trigger level; can be set between 1-63. The default trigger level is 32.
- -T level
- Set receive FIFO trigger level; can be set between 1-63. The default trigger level is 32.
- -u serial_unit_num
- Set serial unit number. The default is 1.
Examples:
Disable the hardware and software flow control for a UART device with the base
address of 0xFF010000 and the IRQ 54.
devc-serxzynq -e -F -S 0xFF010000,54
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