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QNX SDP 8.0 BSP Documentation
The board support package (BSP) documentation includes user guides that describe how to work with the BSPs provided for the QNX Software Development Platform (SDP) 8.0, and release notes that describe the supported features and hardware as well as any known issues for each BSP.
Texas Instruments
Jacinto 7 J721S2 Evaluation Module
User's Guide
BSP-specific Drivers and Utilities
devr-sa2ul
Driver for the SA2_UL TRNG engine on the Xilinx Zynq UltraScale+ MPSoC KD240 Evaluation Kit.

QNX SDP 8.0 BSP Documentation
The board support package (BSP) documentation includes user guides that describe how to work with the BSPs provided for the QNX Software Development Platform (SDP) 8.0, and release notes that describe the supported features and hardware as well as any known issues for each BSP.
- AMD
- Broadcom
- Intel
- NXP
- Texas Instruments
  - Jacinto 7 J721E (DRA829/TDA4xM) Evaluation Module
  - Jacinto 7 TDA4VM Starter Kit
  - Jacinto 7 J721S2 Evaluation Module
    - Release Notes
    - Graphics Release Notes
      This document lists the details, updates, and issues associated with this screen board support release.
    - User's Guide
      - Before you begin
        Before you begin working with this BSP you should become familiar with the resources available to you when building QNX embedded systems.
      - About this BSP
        This chapter lists what's included in the BSP, the supported host system operating systems, and other relevant information to use this BSP.
      - Installation Notes
        These installation notes describe how to use this BSP to boot your board with the QNX OS.
      - Build the BSP
        You can use the QNX Momentics IDE or the commandline on Linux or Windows to build an image.
      - Driver Commands
        The tables below provide a summary of driver commands.
      - BSP-specific Drivers and Utilities
        devc-seromap
        Serial driver for the Texas Instruments boards.
        devf-j7-ospi
        Driver for the OSPI Flash memory
        devr-sa2ul
        Driver for the SA2_UL TRNG engine on the Xilinx Zynq UltraScale+ MPSoC KD240 Evaluation Kit.
        devs-cpsw-j721s2.so
        Driver for Texas Instruments Common Platform Ethernet Switch (CPSW) J7/AM62 devices
        devu-hcd-cdns3-xhci
        Driver for Extensible Host Controller Interface (XHCI) USB controllers on the Xilinx Zynq UltraScale+ MPSoC KD240 Evaluation Kit.
        i2c-tda4
        Driver for inter-integrated circuits on the Xilinx Zynq UltraScale+ MPSoC KD240 Evaluation Kit.
        rtc
        Set or get date from realtime clock (Xilinx Zynq UltraScale+ MPSoC KD240 Evaluation Kit)
  - J722S Evaluation Module
  - Jacinto 7 J742S2 Evaluation Module
  - Jacinto 7 J784S4 Evaluation Module
  - TI AM62a Starter Kit Evaluation Module (SK EVM)
  - TI AM62P Starter Kit Evaluation Module (SK EVM)
  - TI AM62x Starter Kit Evaluation Module (SK EVM)
Typographical Conventions, Support, and Licensing
This section describes the typographical conventions used throughout the documentation, explains how to obtain technical support, and provides some information about licensing.

devr-sa2ul

Driver for the SA2_UL TRNG engine on the Texas Instruments Jacinto 7 J721S2 EVM.

Syntax:

random -l devr-sa2ul.so[:option[,option...]]

Runs on:

QNX OS

Targets:

aarch64le

Options:

prio=X: Priority to run the thread at. Valid range is 1 - 255. Default is inherit the process priority.
samples=X: Sample cycles. Valid range is 1 - 65535. Default is 5000
clkdiv=X: Sample clock divider. Valid range is 1 - 16. Default is 2.
mmra=X: MMRA base address. default is 0x04e01000.
trng=X: TRNG base address. default is 0x04e10000.
irq=X: TRNG ready IRQ number. default is 43.
noinit: Skip TRNG initialization.

Examples:

random -l devr-sa2ul.so

Page updated: October 24, 2025