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QNX Software Development Platform
QNX SDP is a cross-compiling and debugging environment, including an IDE and command-line tools, for building binary images and programs for target boards running the QNX OS 8.0.
OS Components & Operations
Building Embedded Systems
The Building Embedded Systems guide is intended for developers who are developing or building BSPs for QNX OS embedded systems.
System Page
The system page contains essential information about the system, including the system page's size, information about the hardware platform (including IRQs and the CPU), the cache size, and the location of kernel callouts in memory.
un
Union where processor-specific system page information is kept

QNX Momentics IDE User's Guide
This User's Guide describes version 8.0 of the Integrated Development Environment (IDE) that's part of the QNX Tool Suite.
QNX Software Development Platform
QNX SDP is a cross-compiling and debugging environment, including an IDE and command-line tools, for building binary images and programs for target boards running the QNX OS 8.0.
- Quickstart Guide
- System Architecture
  The System Architecture guide accompanies the QNX OS and is intended for both application developers and end-users.
- OS Components & Operations
  - Boot Optimization Guide
    The Boot Optimization Guide describes techniques you can use to reduce the time from your board's initial power on until you have a fully functional QNX system running on the board.
  - Building Embedded Systems
    The Building Embedded Systems guide is intended for developers who are developing or building BSPs for QNX OS embedded systems.
    - Overview
      QNX systems are built from the QNX OS standard release components, the architecture- and board-specific files provided in QNX BSPs, and customer and third-party components.
    - Working with QNX BSPs
      Before you attempt to write a new BSP or modify an existing one, it is helpful to know how to use a BSP.
    - Initial Program Loaders (IPLs)
      IPLs first set up the minimum environment needed to execute their compiled C code, then find the OS image and load it into memory, and then jump to the QNX startup code.
    - Startup Programs
      The first program to run in a bootable OS image is the startup program; it completes the system configuration, then launches the OS kernel.
    - Kernel Callouts
      Kernel callouts are standalone pieces of code (or code fragments) that the kernel uses to perform hardware-specific functions. These callouts don't need to be statically linked to the kernel.
    - System Page
      The system page contains essential information about the system, including the system page's size, information about the hardware platform (including IRQs and the CPU), the cache size, and the location of kernel callouts in memory.
      - system_private
        Information needed by the operating system when booting
      - asinfo
        Array of structures describing different sections of the system memory map (e.g., RAM, SRAM, flash, I/O ranges)
      - hwinfo
        Information about the hardware platform (type of bus, devices, IRQs, etc)
      - cpuinfo
        Information about each CPU in the system
      - cacheattr
        Information about the on-chip and off-chip cache system configuration
      - qtime
        Information about the system's timebase, and other time-related information
      - callout
        Information for kernel callouts
      - intrinfo
        Information about the interrupt system
      - smp
        Information for IPIs in SMP systems
      - un
        Union where processor-specific system page information is kept
    - OS Images
      OS images are files that contains the OS, your executables, and any data files that might be related to your programs.
    - OS Image Buildfiles
      You can edit OS image buildfiles to configure OS images.
    - IPL Library
      The IPL library contains a set of routines for building a custom IPL.
    - Startup Library
      The startup library contains a rich set of routines ranging from high-level functions called by main() to utility functions for performing specific startup tasks.
    - Debugging QNX Embedded Systems
      The microkernel architecture of QNX OS means that debugging QNX embedded systems can be different from debugging other embedded systems.
    - Sample Buildfiles
      This appendix contains sample buildfiles that you can modify to support your hardware platform and your implementation requirements.
    - Glossary
  - Customizing a BSP
    While QNX provides Board Support Packages (BSPs) for many common platforms and their individual variants, in some cases, you need a BSP for a board that QNX does not provide. If this is the case, you can modify a QNX BSP or develop your own.
  - Device Publishers Developer's Guide
  - High Availability Framework Developer's Guide
  - High-Performance Networking Stack (io-sock) User's Guide
    This guide contains instructions for implementing and using the QNX OS High-Performance Networking Stack and its manager, io-sock.
  - PCI Server User's Guide
  - Performance Tuning User's Guide
  - SMMUMAN User's Guide
  - System Analysis Toolkit (SAT) User's Guide
  - Technotes
  - User's Guide
    The QNX OS User's Guide is intended for all users of a QNX OS system, from system administrators to end users.
- Graphics
- Programming
- System Security Guide
  The QNX System Security Guide is intended for both system integrators who are responsible for the security of a QNX OS system and developers who want to create a QNX OS resource manager free from vulnerabilities.
- Utilities & Libraries
- Migrating to QNX OS 8.0
QNX Software in the Cloud
QNX Software in the Cloud enables developers to use the QNX OS in the Amazon cloud environment.
QNX Toolkit for Visual Studio Code
This User's Guide describes the QNX^® Toolkit for Visual Studio Code. The guide introduces you to the QNX Toolkit by explaining the QNX development environment and how to build, run, and debug your QNX^® Operating System (OS) applications and systems.
QNX Hypervisor User's Guide
This User's Guide explains the QNX hypervisor architecture and provides instructions for installing and running a QNX Hypervisor system, changing system components and configuration, and using hypervisor features such as virtual devices (vdevs).
Typographical Conventions, Support, and Licensing
This section describes the typographical conventions used throughout the documentation, explains how to obtain technical support, and provides some information about licensing.

`un`

QNX SDP8.0Building Embedded SystemsConfigurationDeveloper

Union where processor-specific system page information is kept

The un union stores processor-specific system page information. The union serves as a demultiplexing point for the various CPU families. It is demultiplexed based on the value of the type member of the system page structure.

Currently supported CPU architectures include:


Processor	Member	`type`
ARM, 64-bit	`aarch64`	SYSPAGE_AARCH64
x86, 64-bit	`x86_64`	SYSPAGE_X86_64

`un.x86_64`

These structures contain x86-specific information. Usually, startup library functions automatically fill in these structures, which contain the following members:

smpinfo: Contains information on how to manipulate the SMP control hardware; filled in by init_smp().
gdt: Contains the Global Descriptor Table (GDT).
idt: Contains the Interrupt Descriptor Table (IDT).
pgdir: Contains pointers to the Page Directory Tables (PDTs).
real_addr: Virtual address corresponding to the physical address range 0 through 0xFFFFF (the bottom 1 megabyte).

`un.aarch64`

These structures contain ARM-specific information. Usually, startup library functions automatically fill in these structures, which contain the following members:

L1_vaddr: Virtual address of the MMU level-one page table used to map the kernel.
L1_paddr: Physical address of the MMU level-one page table used to map the kernel.
startup_base: Virtual address of a one-to-one virtual-to-physical mapping used to map the startup code that enables the MMU. This mapping is removed when the kernel is initialized.
startup_size: Size of the mapping used for startup_base, in bytes.
cpu: Structure containing ARM core-specific operations and data (see the next subsection).

ARM `cpu`

Currently the ARM cpu structure contains the following routines:

page_flush(): Implements CPU-specific cache/TLB flushing when the memory manager unmaps or changes the access protections to a virtual memory mapping for a page. This routine is called for each page in a range being modified by the virtual memory manager.
page_flush_deferred(): Performs any operations that can be deferred when the page_flush() kernel callout is used. For example on the SA-1110 processor, an Icache flush is deferred until all pages being operated on have been modified.

Page updated: March 05, 2025