Terminology

QNX SDP8.0SMMUMAN User's GuideAPIConfigurationUtilities

The following terms are used throughout the SMMUMAN documentation.

DMA
Direct Memory Access
Guest
A guest is an OS running in a QNX hypervisor qvm process; this process presents the virtual machine (VM) in which the guest runs.
Guest-physical address
A memory address in guest-physical memory (see Guest-physical memory below).
Guest-physical memory
The memory assembled for a VM by the qvm process that creates and configures the VM. ARM calls this assembled memory intermediate physical memory; Intel calls it guest physical memory. For simplicity, regardless of the platform, we will use the term Bugnion, Nieh and Tsafrir use in Hardware and Software Support for Virtualization (Morgan & Claypool, 2017): guest-physical memory, and the corresponding term: guest-physical address.
Host
Either the development host (the desktop or laptop, which you can connect to your target system to load a new image or debug), or the hypervisor host domain.
Host-physical address
A memory address in host-physical memory (see Host-physical memory below).
Host-physical memory
The physical memory; this is the memory seen by the hypervisor host, or any other entity running in a non-virtualized environment. (see Guest-physical memory above).
Hypervisor
A microkernel that includes virtualization extensions. In a QNX environment, these extensions are enabled by adding the module=qvm directive in a QNX buildfile.
IOMMU
Input/Output Memory Management Unit. A memory management unit (MMU) that connects a DMA–capable I/O bus to the main memory. Like a traditional MMU, which translates CPU-visible intermediate addresses to physical addresses, an IOMMU maps device-visible intermediate addresses (also called device addresses or I/O addresses in this context) to physical addresses. This mapping ensures that DMA devices cannot interact with memory outside their bounded areas.
IPMMU
Intellectual Property MMU. IOMMU on Renesas R-Car platforms.
QNX hypervisor
The running instance of either the non-safety QNX Hypervisor product or the safety-certified QNX Hypervisor for Safety product.
Reserved memory region
A reserved memory region is a region in memory required by the specification for a particular device, typically to hold some information such as tables the device needs in order to operate. Unless you specify otherwise, the smmuman service looks after these regions (see smmu_obj_create_flags in the SMMUMAN Client API Reference chapter).
Note:
A reserved memory region is not the same as a memory area you map to a SMMU object.
SMMU
System Memory Management Unit. An ARM implementation of an IOMMU.
VT-d
Intel Virtualization Technology for Directed I/O (VT-d) is an Intel implementation of an IOMMU.
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