Options for Renesas R-Car IPMMUs

Updated: May 06, 2022

On the Renesas R-Car H3 and other related boards, IOMMU/SMMUs are known as IPMMUs; a smmuman service running on the hardware needs a support library for the board IPMMUs.

The configurations described here are for use with the smmu-rcar3.so and smmu-rcar3-safety.so support libraries for Renesas R-Car H3 IPMMUs. These support libraries implement the code to communicate with Renesas R-Car H3 IPMMUs, as specified in Chapter 16 Renesas R-Car Series, 3rd Generation User’s Manual: Hardware, Nov. 2018 (Rev. 1.50).

To load this support library, you must set the smmu option's smmu_type argument to the name of the support library:

Options

The following describes the options for a smmuman service using a smmu-rcar3.so or smmu-rcar3-safety.so support library for SMMUs that use the Renesas R-Car H3 IPMMU architecture.

smmu_type_param

On boards that use the Renesas R-Car H3 IPMMU architecture, the smmu_type_param argument is as follows:

paddr,fault_vector,mm_fault_bit{,socid.revid}
paddr
The physical address of the main memory IPMMU unit registers.
fault_vector
The interrupt that occurs when an illegal DMA request is attempted.
mm_fault_bit
The interrupt bit that is set when a page table fault occurs.
The page table fault interrupt bit may be different on different chips and chip revisions; check the hardware documentation for the chip you are using.
socid
A SoC identification number supported by the configuration data.
revid
A supported revision number of the SoC supported by the configuration data.

For example, the following configuration is for an R-Car H3 SOC (revision 3.0), as described in the Renesas R-Car Series, 3rd Generation User’s Manual: Hardware, Nov. 2018 (Rev. 1.50):

smmu rcar3 0xe67b0000,228,18,0x4f.0x20

where 0xe67b0000 is the physical address of the main memory IPMMU unit registers, 228 is the interrupt that occurs when an illegal DMA request is attempted, 18 is the page table fault interrupt bit, and 0x4f.0x20 is the ID and revision numbers of the SoC supported by the configuration data.

smmu_unit_param

On boards that use the Renesas R-Car H3 IPMMU architecture, the syntax for smmu_unit_param is as follows:

paddr,intr_status_bit
paddr
The physical address of the IPMMU unit registers.
intr_status_bit
The bit number in the interrupt status register where this unit has encountered a fault condition.
smmu_use_param

On boards that use the Renesas R-Car H3 IPMMU architecture, the syntax for smmu_use_param is as follows:

utlb
utlb
The micro-translation lookaside buffer (TLB) number to use for the device.

For example:

device mem:0xE6EF0000 use vi0 0

where mem: defines a memory-mapped I/O device at physical address 0xE6EF0000; this device uses the vi0 IOMMU/SMMU unit and the micro-translation lookaside buffer (TLB) 0.

Configuring unit and TLB values for multiple devices

Don't use multiple lines to configure multiple devices to share the same unit (smmu_unit_param paddr) and TLB values (smmu_use_param utlb); this sort of configuration may cause problems with the device disconnection and lead to undefined behavior. For example, don't do the following:

device mem:0xe6ef0000 use vi0 0
device mem:0xe6ef1000 use vi0 0
device mem:0xe6ef2000 use vi0 0
device mem:0xe6ef3000 use vi0 0

Instead, use a single line specifying the device option's device_spec and length arguments. For example:

device mem:0xe6ef0000/0x4000 use vi0 0
Warning: Devices that share the same unit and TLB are linked to the same memory region map, and hence aren't protected from each other.