About This Guide

Updated: October 26, 2022

The System Architecture guide accompanies the QNX Neutrino RTOS and is intended for both application developers and end-users.

This guide describes the philosophy of QNX Neutrino and the architecture used to robustly implement the OS. It covers message-passing services, followed by the details of the microkernel, the process manager, resource managers, and other aspects of the OS.

The following table may help you find information quickly:

To find out about: Go to:
OS design goals; message-passing IPC The Philosophy of the QNX Neutrino RTOS
System services The QNX Neutrino Microkernel
Sharing information between processes Interprocess Communication (IPC)
System event monitoring The Instrumented Microkernel
Working on a system with more than one processor Multicore Processing
Memory management, pathname management, etc. Process Manager
Shared objects Dynamic Linking
Device drivers Resource Managers
Image, RAM, Power-Safe, DOS, Flash, NFS, CIFS, Ext2, and other filesystems Filesystems
Persistent Publish/Subscribe (PPS) PPS
Serial and parallel devices Character I/O
Network subsystem Networking Architecture
Native QNX Neutrino networking Native Networking (Qnet)
TCP/IP implementation TCP/IP Networking
Fault recovery High Availability
Sharing resources among competing processes Adaptive Partitioning
An overview of hard and soft real time What is Real Time and Why Do I Need It?
Terms used in QNX Neutrino documentation Glossary

For information about programming, see Getting Started with QNX Neutrino and the QNX Neutrino Programmer's Guide.