Optimizing an IPL
You can use a variety of strategies to optimize an IPL.
- Enable the data cache before doing the checksum calculation for the OS image. With the d-cache/MMU enabled, the calculation will use the cache (which is faster than RAM) for temporarily storing values.
- Remove all prints to the serial port. Individually, these aren't very costly, but they quickly add up and increase the boot time.
- When booting from eMMC, use the fastest allowable bus speed (e.g., DDR50 or HS200).
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When booting from eMMC, enable
power off notification
(added in eMMC version 4.5)—a lot of time (several hundred milliseconds) is spent waiting for the eMMC device to be ready before the IPL even starts.Power off notification allows the SDMMC driver to notify the eMMC part before the board shuts down, allowing subsequent boots to be faster. To enable power notification, verify that the eMMC part supports power off notification, then make sure the SDMMC driver uses the pwroff_notify option.
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When using NOR Flash, use optimized NOR timing values. By default, an IPL will use large (slow) timing values to ensure that they are sufficient for a broad range of boards and conditions. (The IPL may be reused across a board family, for instance.) Setting the timing to the optimal values eliminates unneeded waiting and can reduce the time the IPL needs to complete its tasks.
Check the hardware manufacturer's documentation for the optimal timing values for your specific board.
- When using NOR flash, check if the SoC boot ROM can execute the IPL in place (XIP) instead of copying the IPL into RAM or SRAM then jumping to the IPL.
For more information about optimizing your boot, see the Boot Optimization Guide.