devs-cpsw-processor.so

Driver for Texas Instruments Common Platform Ethernet Switch (CPSW) J7/AM62 devices

Syntax:

io-sock -o dtb=dtb_file -d cpsw-processor [option[,option...]]

mount -T io-sock [-o option[,option...]] cpsw-processor

Runs on:

QNX Neutrino

Options:

Use commas, not spaces, to separate the options.
dtb=dtb_file
Specifies a flattened device tree blob (DTB) file. For more information, go to Using io-sock with a Flattened Device Tree (FDT).
prefix=prefix
Specifies the instance of io-sock that mounts this driver. You specify the prefix that creates an alternative stack when you start io-sock. Used only when you load a driver with mount after starting io-sock.
qnxdev=device
When Plug & Play is disabled, specifies the device instance to use. Use devinfo -v to determine the location value to use (e.g., qnxdev=ofwbus1:0x46000000).

Description:

For devs-cpsw-processor.so drivers, the suffix processor indicates the Texas Instruments (TI) Processor SDK that was used at compilation time. For example, the devs-cpsw-j721e.so driver is compiled against the header files from the J721E Processor SDK.

For information on starting io-sock with a driver or loading a driver later using mount, see Starting io-sock and Driver Management.

Devices

Support for CPSW2G_MAIN, CPSW2G_MCU, CPSW9G, and CPSW3G devices is enabled by default. Devices can be disabled in the io-sock configuration file using tunables. For example, the following entries disable all devices except for CPSW2G_MCU: 
hw.cpsw.cpsw2g_main="0"
hw.cpsw.cpsw9g="0"
hw.cpsw.cpsw3g="0"

The devs-cpsw-processor.so drivers create a device hierarchy. A cpswss device is created for each cpsw controller, and a cpsw device is created for each port.

Hardware statistics

You can use sysctl to display the hardware statistics. For example: 
sysctl dev.cpswss.0.stats

The statistics are displayed using the CPSW device ALE port index. By default, many statistics are not shown. To see additional statistics, in the io-sock configuration file, set the hw.cpsw.stats tunable to 1.

Port mapping for CPSW9G devices

For CPSW9G devices, it may be necessary to specify the mapping of the logical port to the controller's ALE port in the io-sock configuration file.

The following examples show port mapping for the GESI expansion board and the Quad ethernet expansion module on the J721E EVM.

GESI: 
dev.cpswss.0.ports.1.ale_port="1"
dev.cpswss.0.ports.2.ale_port="8"
dev.cpswss.0.ports.3.ale_port="3"
dev.cpswss.0.ports.4.ale_port="4"
Quad: 
dev.cpswss.0.ports.1.ale_port="5"
dev.cpswss.0.ports.2.ale_port="2"
dev.cpswss.0.ports.3.ale_port="6"
dev.cpswss.0.ports.4.ale_port="7"

Port settings and configuration

Use sysctl to examine the settings when the device is attached. For example: 
sysctl dev.cpswss.0.ports
By default, all ports are configured as MAC-only ports. To change the port configuration use the io-sock configuration file. For example: 
dev.cpswss.0.ports.1.mode="switch"
dev.cpswss.0.ports.2.mode="switch"
dev.cpswss.0.ports.3.mode="switch"
dev.cpswss.0.ports.4.mode="maconly"

Required libraries

In addition to the libfdt.so required by FDT network drivers, the devs-cpsw-processor.so drivers require the following TI libraries:

  • libti-pdk.so
  • libti-sciclient.so
  • libti-udmalld.so
  • libtiudma-usr.so
Page updated: