Caution: This version of this document is no longer maintained. For the latest documentation, see

Supporting Vector Floating Point Functionality for ARM Processors

This technote explains how to use the QNX Neutrino vector floating point (VFP) functionality support for ARM processors.


The ARM floating point functionality is implemented in software because the majority of ARM processors don't have built-in floating point hardware.

The VFP functionality support is enabled when the startup program detects the presence of VFP hardware and sets the system page CPU_FLAG_FPU flag.

The QNX Neutrino procnto and procnto-v6 provides the basic support for managing the VFP context on a per-thread basis. This support uses a lazy mechanism to minimize the cost of saving and restoring the VFP register context as follows:

Restrictions on VFP usage

The VFP support implements only the RunFast mode of operation:

Note: Both Round-to-nearest and Flush-to-zero are defined in the IEE754 standard.

This mode of operation doesn't require any software support code. However, it doesn't provide full IEE754 compliance. For full details about the RunFast mode of operation, see the ARM Architecture Reference Manual, published by ARM.

No software emulation or support code is provided for the VFP instruction set. This means that code using VFP instructions can be run only on a processor that implements VFP hardware. Executing VFP instructions without the presence of VFP hardware will result in a SIGFPE signal.

The standard QNX Neutrino libraries are compiled to use a soft-float implementation for floating-point operations to ensure the code can run on all supported ARM processors.

The soft-float implementation passes floating-point arguments and results in ARM registers, or on the stack. The code that uses VFP instructions for floating point must use the same argument (or result mechanism) to ensure that it can interoperate correctly with code compiled for soft-float.

A VFP enabled math library, called, is provided and can be used on targets that implement VFP hardware in two ways:

BSP configuration

The startup program is responsible for detecting the presence of VFP hardware:

Processor Detection is performed by
ARMv6 processors libstartup.a, armv_setup_v6()
Other processors Board-specific startup routines

If the VFP is present, the startup program should ensure that:

Using VFP instructions

You must use the following gcc and binutils versions to allow the compiler and assembler to use VFP instructions.

The following compiler flags are required:

-mfpu=vfp -mfloat-abi=softvfp

This causes gcc to use VFP instructions for floating point, and to use the soft-float ABI (application binary interface) to pass floating-point arguments and results in ARM registers. The ABI defines the calling convention of register usage for arguments and results in procedure calls.

Application code must not change FPSCR bits that would change the mode to anything other than the RunFast operation:

If these bits are altered, it's possible for the VFP to generate exceptions that require software support. Since no software support is currently provided, this will result in a SIGFPE signal.