This chapter presents the architecture of the SMMUMAN, and its responsibilities and behavior.
The QNX System Memory Management Unit Manager (SMMUMAN) is a system memory management unit (IOMMU/SMMU) manager that runs the following board architectures: ARM and x86, and makes use of the DMA containment and memory-management support available for these architectures.
On ARM platforms, IOMMU/SMMU components are usually called “System Memory Management Units” (SMMUs); on Intel x86 platforms, this technology is usually called “Virtualization Technology for Directed I/O” (VT-d).
In this document we use “IOMMU/SMMU” to refer to the component on any supported hardware platform, unless referring to a component for a specific architecture or board, exclusive of other architectures or boards, in which case we use the architecture-specific or board-specific acronym (e.g., “VT-d” (Intel x86), “SMMU” (ARM), “IPMMU” (ARM: Renesas R-Car boards)).
The SMMUMAN can run on ARM or x86 platforms. If it is running in a guest in a QNX Hypervisor VM, that VM must be configured to present the functional equivalent of the underlying hardware platform to its guest.
To support the SMMUMAN, ARM platforms require the following:
To support the SMMUMAN, x86 platforms require the following:
The SMMUMAN can be included in:
It is intended for use on the supported hardware platforms with the following software:
When the SMMUMAN or any of its components meets an unknown or undefined condition, it attempts to enter its Design Safe State (DSS). This DSS is to exit.