Definitions for MSI messaging.
See the PCI specification.
#define PCI_MSI_PVM 0x0100
Per vector masking
#define PCI_MSI_64BIT 0x0080
64-bit address capable
#define PCI_MSI_MME_MASK 0x0070
Multiple message enable mask
#define PCI_MSI_MMC_MASK 0x000e
Multiple message_capable mask
#define PCI_MSI_ENABLE 0x0001
MSI Enable
#define PCI_MSIX_ENABLE 0x8000
MSI-X Enable
#define PCI_MSIX_FUNC_MASK 0x4000
MSI-X function mask
#define PCI_MSIX_TAB_SIZE 0x07ff
MSI-X table size mask
#define PCI_MSIX_BIR_MASK 0x0007
MSI-X Base Index Register mask
#define PCI_MSIX_TABLE_ENTRY_SIZE 0x0010u
Number of bytes in each MSIX table entry
#define PCI_MSIX_PBA_BIR_MASK 0x0007u
MSI-X Base Index Register mask